NPTEL :: Computer Science and Engineering - Parallel Computer Architecture

Modules / Lectures

Module 1: Multi-core: The Ultimate Dose of Moore
- Evolution of Processor Architecture
- Moore's Law and Multi-cores
Module 2: Parallel Computer Architecture: Today and Tomorrow
- Evaluating Performance
- Shared Memory Multiprocessors
Module 3: Recap: Single-threaded Execution
- Pipelining and Hazards
- Instruction Issue Algorithms
Module 4: Recap: Virtual Memory and Caches
- Virtual Memory, TLB, and Caches
- Cache Hierarchy and Memory-level Parallelism
Module 5: MIPS R10000: A Case Study
- MIPS R10000: A Case Study
Module 6: Fundamentals of Parallel Computers
- Communication Architecture
- Design Issues in Parallel Computers
Module 7: Parallel Programming
- Steps in Writing a Parallel Program
- Parallelizing a Sequential Program
Module 8: Performance Issues
- Load Balancing and Domain Decomposition
- Locality and Communication Optimizations
Module 9: Introduction to Shared Memory Multiprocessors
- Multiprocessor Organizations and Cache Coherence
- Introduction to Cache Coherence Protocols
Module 10: Design of Shared Memory Multiprocessors
Module 11: Synchronization
Module 12: Multiprocessors on a Snoopy Bus
Module 13: Scalable Multiprocessors
- Scalable Multiprocessors
Module 14: Directory-based Cache Coherence
Module 15: Memory Consistency Models
- Sequential Consistency and Relaxed Models
- Release Consistency and Delayed Consistency
Module 16: Software Distributed Shared Memory Multiprocessors
- Software Distributed Shared Memory Multiprocessors
Module 17: Interconnection Networks
- Introduction to Routers
- Routing Algorithms
Module 18: TLP on Chip: HT/SMT and CMP